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Compact prototyping unit for the laboratory

With MicroLabBox, dSPACE introduces a fully new system category: an all-in-one development system for the laboratory that combines compact size and low system costs with high performance and versatility.

At A Glance

Application Areas

MicroLabBox lets you set up your control, test or measurement applications quickly and easily, and helps you turn your new control concepts into reality. More than 100 I/O channels of different types make MicroLabBox a versatile system that can be used in mechatronic research and development areas, such as robotics, medical engineering, electric drives control, renewable energy, vehicle engineering, or aerospace.

Key Benefits

High computation power combined with very low I/O latencies provide great real-time performance. A programmable FPGA gives you a high degree of flexibility and lets you run even extremely fast control loops, as required in applications such as electric motor control or active noise and vibration cancellation.

MicroLabBox is supported by a comprehensive dSPACE software package, including, e.g., Real-Time Interface (RTI) for Simulink® for model-based I/O integration and the experiment software ControlDesk® Next Generation, which provides access to the real-time application during run time by means of graphical instruments.


Two Connector Panel Variants
MicroLabBox is available in two connector panel variants, each offering a different position for the I/O connectors. The top-panel variant provides Sub-D and BNC connectors and allows easy access to the I/O when the MicroLabBox sits on the user's desk. The front-panel variant provides Sub-D connectors, so you can use MicroLabBox when it is stacked with other laboratory equipment, for example. For easy wiring and signal tracing, the pinout information is shown on the units themselves and is referred to in the I/O blockset of RTI. 

Technical Details




Front Panel Variant

Top Panel Variant


Real-time processor

  • Freescale QorlQ P5020, dual-core, 2 GHz
  • 32 KB L1 data cache per core, 32 KB L1 instruction cache per core, 512 KB L2 cache per core, 2 MB L3 cache total

Host communication co-processor

  • Freescale QorlQ P1011 800 MHz for communication with host PC


  • 1 GB DRAM
  • 128 MB flash memory

Boot time

  • Autonomous booting of applications from flash (depending on application size), ~5 s for a 5 MB application


Host interface

  • Integrated Gigabit Ethernet host interface

Ethernet real- time I/O interface

  • Integrated low-latency Gigabit Ethernet I/O interface

USB interface

  • USB 2.0 interface for data logging ("flight recorder") via USB mass storage device (requires a separate license)

CAN interface

  • 2 CAN channels

Serial interface

  • 2 x UART (RS232/422/485) interface

LVDS interface

  • 1 x LVDS interface to connect with the Programmable Generic Interface PGI1 (support planned for a later release)

Programmable FPGA 1)2)

  • Xilinx® Kintex®-7 FPGA

Analog input

Resolution and type

  • 8 14-bit channels, 10 Msps, differential
  • 24 16-bit channels, 1 Msps, differential

input voltage range

  • -10 ... 10 V

Analog output

Resolution and type

  • 16 16-bit channels, 1 Msps

Output voltage range

  • -10 ... 10 V

Output current

  • ± 8 mA

Digital I/O

  • 48 bidirectional channels, 2.5/3.3/5 V (single-ended)
  • 12 bidirectional channels (RS422/485 type) to connect sensors with differential interfaces
  • I/O functionality: Bit I/O, PWM I/O, SPI Master, functionality for electric motor control

Electric motor control I/O functionality (for up to 2 electric motors)

  • 2 x differential encoder interface
  • 2 x Hall sensor input
  • 2 x resolver interface2)
  • 2 x SSI interface2)
  • 2 x EnDat interface2)
  • Multi-channel PWM
  • Block commutational PWM

Sensor supply

  • 1 x 12 V, max. 3 W/250 mA (fixed)
  • 1 x 2 ... 20 V, max. 1 W/200 mA (variable)

Feedback elements

  • Programmable buzzer
  • Programmable status LEDs

Theft protection

  • Kensington® lock


  • Active cooling (temperature-controlled fan)

Physical connections

  • 4 x Sub-D 50 I/O connectors
  • 4 x Sub-D 9 I/O connectors
  • 2 x Sub-D 50 I/O connectors
  • 48 x BNC I/O connectors
  • 4 x Sub-D 9 I/O connectors
  • 3 x RJ45 for Ethernet (host and I/O)
  • USB Type A (for data logging)
  • 2 x 2 banana connectors for sensor supply
  • Power supply

Physical characteristics

Enclosure size

  • Approx. 310 x 250 x 110 mm (12.2 x 9.8 x 4.3 in)
  • Approx. 310 x 250 x 115 mm (12.2 x 9.8 x 4.5 in)


  • 0 ... 50 °C (ambient temperature)

Power supply

  • 100 ... 240 V AC, 50 ... 60 Hz

Power consumption

  • 125 W


1) User-programmable via the RTI FPGA Programming Blockset. Using the RTI FPGA Programming Blockset requires additional software.


2) SSI, Endat, and resolver interface support are planned for a later release.